DARPA has moved Atom Computing, Diraq, IBM, and IonQ into the final Stage C of its Quantum Benchmarking Initiative, shifting their proposed systems into hands-on government verification and validation. The four teams represent distinct qubit modalities: Atom Computing's neutral atoms, Diraq's silicon CMOS spin qubits, IBM's superconducting processors, and IonQ's trapped ions.
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If Stage C completes on schedule and DARPA publishes at least summary results, this could within two years give defense and enterprise buyers the first apples-to-apples, government-validated comparison of neutral-atom, spin-qubit, superconducting, and trapped-ion systems against a defined utility threshold.
An arXiv preprint reports a benchmark of exchange-only control across a 48-spin singlet manifold. Exchange-only encodings promise high-fidelity operation through the exchange interaction, but each logical qubit consumes at least three electron spins, so only part of the available spin Hilbert space is used for computation. The work characterizes control within this spin manifold.
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This benchmark could provide the leakage and control-error data needed to tune exchange-only qubits in multi-dot devices, making it feasible to operate larger spin-qubit registers with fewer calibration overheads within two years.
Silicon Quantum Computing and Schneider Electric advanced to Stage 2 of the Australian Government’s Critical Technologies Challenge Program, securing A$3.6 million. They are deploying hybrid quantum-classical machine learning models on SQC’s Watermelon™ system to improve energy grid forecasting. The models have shown an average 20% accuracy improvement in tests, with larger gains at peak demand.
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If the accuracy gains hold on live utility data, SQC’s spin-qubit hardware could move from pilot trials into a limited production forecasting workflow inside Schneider Electric’s grid management software within two years.
Researchers at Tohoku University, in collaboration with NIMS and the University of Tokyo, demonstrated charge sensing, high-frequency reflectometry, and a few-electron double quantum dot in zinc oxide. The work establishes basic building blocks for semiconductor spin qubits based on ZnO.
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The demonstrated charge-sensing and few-electron double quantum dot could enable the first spin-state readout and single-qubit control experiments in zinc oxide within two years.
spin qubitNational Institute for Materials ScienceTohoku UniversityUniversity of Tokyo Photonic Inc. and Microsoft are working together to add Photonic's distributed-computing models and quantum low-density parity-check error-correction routines to Microsoft's Quantum Resource Estimator. The aim is to let researchers and developers estimate computational overheads more accurately for algorithms running on multi-chip, distributed quantum systems. The work addresses limitations of existing resource estimators that were designed primarily for monolithic architectures.
OutlookPlausible
If the integration lands as described, algorithm design teams could start using Microsoft's Quantum Resource Estimator within the next two years to compare distributed and monolithic hardware trade-offs for early fault-tolerant quantum algorithms, making modular architectures a default scenario in planning tools rather than a niche add-on.
A new arXiv preprint reports a phase-modulated microwave driving technique for preserving coherence in a hole spin qubit formed in a silicon quantum dot. The technique addresses a known problem with these qubits: the spin-orbit coupling that enables fast, all-electrical control also increases their sensitivity to charge noise, which shortens coherence times. The abstract indicates that holes in silicon are also subject to additional noise mechanisms beyond charge noise.
OutlookPlausible
If the modulation scheme is compatible with existing microwave control hardware, this could become a standard extension for silicon hole spin qubits within two years, improving two-qubit gate fidelities by reducing charge-noise-induced dephasing while retaining fast electrical control.
An arXiv preprint examines a surface-code architecture in which electron spin qubits are physically moved between quantum dots. It uses a standard noise model to quantify how shuttling-induced errors affect the code's logical performance and its prospects for scaling to useful register sizes.
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Within two years, silicon spin-qubit teams could use this framework to set shuttling fidelity targets for early surface-code experiments, narrowing layout and material choices before expensive multi-qubit shuttling hardware is built.
Diraq and Dell Technologies have announced a collaboration to pair Diraq's silicon spin-qubit quantum processors with Dell's high-performance computing and AI infrastructure. Dell is installing an HPC server cluster directly in Diraq's Sydney laboratory to provide low-latency connections between the quantum hardware and classical compute for real-time control. The work includes developing hybrid orchestration software to automate qubit calibration.
OutlookPlausible
Within two years, Diraq could move from batch calibration to closed-loop, low-latency recalibration of its spin qubits during computation, using the in-lab Dell HPC cluster to make real-time adjustments that keep qubits stable through longer circuit runs.
Researchers reported progress on a quantum silicon-on-insulator (QSOI) substrate derived from a 28nm fully-depleted silicon-on-insulator platform, intended for 300mm CMOS-compatible fabrication of spin qubits. They fabricated quantum devices on both standard 28nm FD-SOI and the QSOI variant and compared them. The QSOI arrays showed highly uniform positioning of the first electron across qubit sites.
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If this uniformity persists across full 300mm wafers, it could allow silicon spin qubit arrays to be fabricated with consistent single-electron positions in commercial foundries within two years, reducing the need for per-device tuning.
Quobly reported a demonstration of qubit readout, single-qubit gates, and two-qubit gates on a single chip fabricated with its QSOI technology. The devices were built on a 300 mm silicon wafer, which the company positions as an industrial-scale platform for silicon spin qubits.
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If the demonstrated operations have usable fidelities, Quobly could move from single-device demonstrations to small multi-qubit arrays fabricated in a 300 mm CMOS-compatible flow within two years.
Silicon Quantum Computing reported that patterning its Watermelon quantum-enhanced AI chip, a step that previously took hours by hand, can now be completed in minutes. The company used custom machine learning scripts together with its Quokka software to automate part of the atomic-precision fabrication process.
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Faster patterning could let SQC iterate on atomic-precision device designs much more rapidly, turning hours-long manual layout cycles into quick parameter sweeps.
A preprint introduces an unsupervised autoencoder method for extracting effective Hamiltonians directly from experimental data taken on solid-state quantum simulators. The decoder is constrained by scattering-matrix physics, so the inferred model parameters are meant to represent physically meaningful Hamiltonian terms rather than arbitrary features. The authors present the approach as a generalizable framework for Hamiltonian identification in these systems.
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If the physics-constrained autoencoder performs well on noisy transport or spectroscopy data, spin-qubit groups could replace manual Hamiltonian characterization with a single learned calibration pass within two years.
A preprint proposes a spin-qubit architecture in which a shuttling bus is optimally synthesized to support transversal gates and magic state distillation. The work targets the gap between single-logical-qubit error correction and the need for high-fidelity logical operations between error-corrected qubits at scale.
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This could give experimental silicon spin-qubit groups a concrete route to demonstrating high-fidelity transversal Clifford gates on a small logical qubit within two years.
Diraq, a silicon spin-qubit developer, and data centre operator Equinix will install an eight-qubit quantum processor inside an Equinix facility in Sydney, with completion scheduled for October 2026. The deployment is presented as the first silicon spin-qubit quantum computer placed in a commercial data centre.
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The Sydney installation could let Australian enterprises access a local silicon spin-qubit processor through Equinix's existing data-centre interconnection services, opening early benchmarking and small algorithm-prototyping workloads without sending data to overseas quantum labs.
IBM has completed its acquisition of HRL Laboratories, a Malibu-based R&D institution. The deal brings HRL's silicon-spin qubit, quantum sensing, cryogenics, and advanced materials expertise under IBM's quantum umbrella. IBM says this complements its existing superconducting qubit work and supports a dual-track hardware roadmap.
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IBM could bring silicon-spin qubit test chips into its existing cryogenic and control stack within two years, giving it a second hardware modality alongside superconducting processors.
IBM completed its acquisition of HRL Laboratories, an R&D institution with expertise in quantum computing, quantum sensing, materials science, and advanced technologies. IBM states the combination will bring complementary capabilities to bear on its quantum hardware roadmap.
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IBM could incorporate HRL's silicon fabrication and cryogenic control techniques into its superconducting quantum processors, improving qubit coherence and reducing control wiring overhead in upcoming large-scale systems.
Photonic Inc. has published a paper in Nature Communications describing its SHYPS family of quantum error correction codes. The work focuses on quantum low-density parity-check (QLDPC) codes, which reduce the number of physical qubits needed to run a given program and could bring forward the arrival of commercially useful quantum computers.
OutlookPlausible
Photonic could use SHYPS codes to demonstrate an error-corrected logical qubit on a significantly smaller device than surface-code overhead would require.
Researchers posted a preprint describing zenDot, an LLM-integrated quantum TCAD platform for automating the design and optimization of semiconductor quantum devices. The platform targets spin-qubit and quantum-dot device simulation by coupling large language models with technology computer-aided design workflows.
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If zenDot's LLM layer can reliably map natural-language design goals to TCAD simulation parameters, small spin-qubit research groups could iterate on device layouts and gate voltages in days rather than weeks.
Researchers have posted a preprint describing spin qubits coupled via microwave cavities, a technique that could facilitate high-fidelity interactions between distant qubits. The work explores the use of cavity quantum electrodynamics to mediate entanglement in spin-based quantum processors.
OutlookPlausible
This coupling method could enable high-fidelity two-qubit gates between non-adjacent spin qubits, reducing error rates in small-scale arrays within two years.
Researchers have numerically optimized two-qubit gates for silicon flip-flop qubit arrays using electrical control. The study demonstrates improved gate fidelities through tailored pulse shapes and inter-qubit coupling strategies. This work addresses a key challenge in scaling spin-based quantum processors.
OutlookPlausible
Optimized gate schemes could be tested in existing silicon flip-flop qubit experiments, potentially raising two-qubit gate fidelities to levels where small error correction codes become viable.