Transversal Gates and Magic State Distillation in an Optimally Synthesized Spin-Qubit Shuttling Bus
A preprint proposes a spin-qubit architecture in which a shuttling bus is optimally synthesized to support transversal gates and magic state distillation. The work targets the gap between single-logical-qubit error correction and the need for high-fidelity logical operations between error-corrected qubits at scale.
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What this could mean
- 0–2 yearsPlausible
This could give experimental silicon spin-qubit groups a concrete route to demonstrating high-fidelity transversal Clifford gates on a small logical qubit within two years.
Labs such as QuTech, HRL Laboratories, and Intel already shuttle spin qubits and maintain single-qubit logical memories; this architecture supplies the missing logical-gate layer, so near-term progress depends on integration and fabrication rather than new physics.
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