D-Wave Launches Gate-Model Simulator Beta Program Featuring 21-Qubit Dual-Rail Erasure Emulation
D-Wave has opened a beta program for a gate-model quantum computing simulator through its Leap cloud service. The simulator supports up to 21 qubits and includes ideal and hardware emulation modes that model D-Wave's dual-rail superconducting cavity qubit architecture. It is intended to let users test mid-circuit error detection using hardware-level erasure information.
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What this could mean
- 0–2 yearsPlausible
The simulator could let researchers prototype and validate error-correction protocols for dual-rail erasure qubits before D-Wave has physical gate-model hardware, seeding a software ecosystem around its architecture.
Because erasure information is hardware-level and the simulator runs on Leap, academic and industry groups can benchmark mid-circuit detection schemes now; if the emulation matches D-Wave's real error model closely enough, this lowers the cost of later hardware adoption.
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